Practice 10 questions on SOEN228 - System Hardware (SOEN) at Concordia University. Free AI-generated quiz on uNotes — track your score, retake anytime.
1Convert (21.23) in base-4 into its base-5 representation with up to 2 significant digits after the 'base-5 decimal point'.
2What is the range of integers representable using 6-bit two's complement notation?
3In the Booth algorithm for signed multiplication using 2's complement, what operation is performed when the current multiplier bit is '0' and the previous multiplier bit (to its right) is '1'?
4Which of the following are characteristics of the IEEE 754 32-bit single-precision floating point format?
5During the instruction fetch cycle in a single-bus CPU organization, which control signals are involved in the first time step (T0)?
6In the Intel assembly instruction 'MAC #NUM, (R0)+, R1', identify the addressing modes used for the three operands in order.
7In the primality testing assembly program, what is the purpose of the instruction 'and ax, 1111111100000000b' after a division operation?
8When using a 1-dimensional (1D) address decoding technique for a RAM system, the address decoder output typically connects to which signal of the memory chips?
9In a block-set-associative cache with 4 sets, 2 blocks per set, and 4 locations per block, which bit fields are required to address a main memory of 512 locations?
10True or False: In a CPU with selective load capability for registers, a 'High Impedance' (tri-state) state is used to prevent multiple devices from driving the shared bus simultaneously.
